Moved BFPOWER drivers to Physical
This commit is contained in:
Zachary Sunforge
386
drivers/ads1256/driver/src/io.rs
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386
drivers/ads1256/driver/src/io.rs
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@ -0,0 +1,386 @@
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use crate::{
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adcon, drate, fsc0, fsc2, gpio, mux, ofc0, opcodes, status, AdControl, Ads1256, AllCalibration,
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BlockingDelay, CalibrationCommand, Config, DataRate, DigitalIo, GainCalibration, Multiplexer,
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OffsetCalibration, Status,
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};
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use embedded_hal::digital::OutputPin;
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use embedded_hal::spi;
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use embedded_hal::spi::SpiBus;
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use embedded_hal_async::digital::Wait;
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use physical_node::GPIO_ERROR_MSG;
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use physical_node::spi::{end_spi, end_spi_if_err};
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impl<DelayerT, SST, DrdyT> Ads1256<DelayerT, SST, DrdyT>
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where
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DelayerT: BlockingDelay,
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SST: OutputPin,
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DrdyT: Wait,
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{
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//----- Base register read/write ----------------------------------
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/// [buffer] - The data to send the the ADS1256 starting at index 2, the first two bytes are
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/// reserved as the command bytes.
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#[inline]
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pub fn raw_write_registers<SpiT: SpiBus, const BUF_SIZE: usize>(
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&mut self,
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spi: &mut SpiT,
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start_address: u8,
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mut buffer: [u8; BUF_SIZE],
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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let num_registers = BUF_SIZE - 2;
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assert!(start_address <= fsc2::ADDRESS, "Invalid starting register address.");
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//TODO: Change to compile time assertion or bound in future Rust version.
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assert!(num_registers <= 11, "Cannot write more than the total number of registers.");
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assert!(num_registers >= 1, "Must write at least one register.");
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// num_registers represents the total number of registers to write, including the one at the
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// provided address. Adjust values based on it accordingly.
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// First command byte = 4 bits for the write register opcode, followed by 4 bits for the
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// starting register address.
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let cmd_start = opcodes::WREG | start_address;
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// Second byte = number of registers to write in addition to the register at the starting
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// address.
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let num_additional = num_registers as u8 - 1;
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buffer[0] = cmd_start;
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buffer[1] = num_additional;
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spi.write(&buffer)
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}
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/// [buffer] - The data to send the the ADS1256 starting at index 2, the first two bytes are
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/// reserved as the command bytes.
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#[inline]
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pub fn write_registers<SpiT: SpiBus, const BUF_SIZE: usize>(
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&mut self,
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spi: &mut SpiT,
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start_address: u8,
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buffer: [u8; BUF_SIZE],
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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self.slave_select.set_low().expect(GPIO_ERROR_MSG);
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let spi_op_result = self.raw_write_registers(spi, start_address, buffer);
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end_spi(&mut self.slave_select, spi, spi_op_result)
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}
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fn read_registers<SpiT: SpiBus, const NUM: usize>(
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&mut self,
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spi: &mut SpiT,
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start_address: u8,
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) -> Result<[u8; NUM], <SpiT as spi::ErrorType>::Error> {
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assert!(start_address <= fsc2::ADDRESS, "Invalid starting register address.");
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//TODO: Change to compile time assertion or bound.
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assert!(NUM <= 11, "Cannot read more than the total number of registers.");
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assert!(NUM >= 1, "Must read at least one register.");
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// NUM represents the total number of registers to read, including the one at the provided
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// address. Adjust values based on it accordingly.
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// First command byte = 4 bits for the read register opcode, followed by 4 bits for the
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// starting register address.
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let cmd_start = opcodes::RREG | start_address;
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// Second byte = number of registers to read in addition to the register at the starting
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// address.
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let num_additional = NUM as u8 - 1;
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let mut buffer = [0u8; NUM];
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self.slave_select.set_low().expect(GPIO_ERROR_MSG);
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let spi_op_result = spi.write(&[cmd_start, num_additional]);
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end_spi_if_err(&mut self.slave_select, spi, spi_op_result)?;
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self.delayer.t6_delay();
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let spi_op_result = spi.read(&mut buffer);
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end_spi(&mut self.slave_select, spi, spi_op_result)?;
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Ok(buffer)
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}
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//----- Standalone commands ----------------------------------
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#[inline]
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fn standalone_command<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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opcode: u8,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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self.slave_select.set_low().expect(GPIO_ERROR_MSG);
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let spi_op_result = spi.write(&[opcode]);
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end_spi(&mut self.slave_select, spi, spi_op_result)
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}
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#[inline(always)]
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pub fn standby<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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self.standalone_command(spi, opcodes::STANDBY)
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}
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/// Self calibration is performed after reset, therefore additional commands should not be sent
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/// until data ready pin goes low indicating the calibration is complete.
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#[inline(always)]
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pub fn reset<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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self.standalone_command(spi, opcodes::RESET)
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}
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#[inline(always)]
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pub fn wake<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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self.standalone_command(spi, opcodes::WAKEUP)
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}
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/// Perform self offset and gain calibration.
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#[inline]
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pub async fn self_calibrate<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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let result = self.standalone_command(spi, opcodes::SELFCAL);
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self.data_ready.wait_for_low().await.expect(GPIO_ERROR_MSG);
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result
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}
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/// Perform self offset calibration.
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#[inline]
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pub async fn self_offset_calibrate<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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let result = self.standalone_command(spi, opcodes::SELFOCAL);
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self.data_ready.wait_for_low().await.expect(GPIO_ERROR_MSG);
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result
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}
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/// Perform self gain calibration.
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#[inline]
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pub async fn self_gain_calibrate<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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let result = self.standalone_command(spi, opcodes::SELFGCAL);
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self.data_ready.wait_for_low().await.expect(GPIO_ERROR_MSG);
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result
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}
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/// Perform system offset calibration.
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#[inline]
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pub async fn system_offset_calibrate<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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let result = self.standalone_command(spi, opcodes::SYSOCAL);
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self.data_ready.wait_for_low().await.expect(GPIO_ERROR_MSG);
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result
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}
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/// Perform system gain calibration.
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#[inline]
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pub async fn system_gain_calibrate<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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let result = self.standalone_command(spi, opcodes::SYSGCAL);
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self.data_ready.wait_for_low().await.expect(GPIO_ERROR_MSG);
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result
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}
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//----- Public register read/write ----------------------------------
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#[inline]
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pub fn read_status<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<Status, <SpiT as spi::ErrorType>::Error> {
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Ok(Status(self.read_registers::<_, 1>(spi, status::ADDRESS)?[0]))
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}
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#[inline]
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pub fn write_status<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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setting: Status,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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// Create full command buffer, initialize command bytes to 0 and set data value to status
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// byte.
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let buffer: [u8; 3] = [0, 0, setting.0];
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self.write_registers(spi, status::ADDRESS, buffer)
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}
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#[inline]
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pub fn read_multiplexer<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<Multiplexer, <SpiT as spi::ErrorType>::Error> {
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Ok(Multiplexer(self.read_registers::<_, 1>(spi, mux::ADDRESS)?[0]))
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}
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#[inline]
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pub fn write_multiplexer<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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setting: Multiplexer,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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// Create full command buffer, initialize command bytes to 0 and set data value to status
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// byte.
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let buffer: [u8; 3] = [0, 0, setting.0];
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self.write_registers(spi, mux::ADDRESS, buffer)
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}
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#[inline]
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pub fn read_ad_control<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<AdControl, <SpiT as spi::ErrorType>::Error> {
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Ok(AdControl(self.read_registers::<_, 1>(spi, adcon::ADDRESS)?[0]))
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}
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#[inline]
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pub fn write_ad_control<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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setting: AdControl,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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// Create full command buffer, initialize command bytes to 0 and set data value to status
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// byte.
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let buffer: [u8; 3] = [0, 0, setting.0];
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self.write_registers(spi, adcon::ADDRESS, buffer)
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}
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/// Combined function to write the ADC and multiplexer registers at the same time since this is such a common
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/// occurrence.
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#[inline]
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pub fn write_mux_adc<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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input: Multiplexer,
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ad_control: AdControl,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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let buffer = [0u8, 0u8, input.0, ad_control.0];
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self.write_registers(spi, mux::ADDRESS, buffer)
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}
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#[inline]
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pub fn read_data_rate<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<DataRate, <SpiT as spi::ErrorType>::Error> {
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Ok(DataRate::from_byte(self.read_registers::<_, 1>(spi, drate::ADDRESS)?[0]))
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}
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#[inline]
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pub fn write_data_rate<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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setting: DataRate,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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// Create full command buffer, initialize command bytes to 0 and set data value to status
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// byte.
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let buffer: [u8; 3] = [0, 0, setting as u8];
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self.write_registers(spi, drate::ADDRESS, buffer)
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}
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#[inline]
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pub fn read_gpio<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<DigitalIo, <SpiT as spi::ErrorType>::Error> {
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Ok(DigitalIo(self.read_registers::<_, 1>(spi, gpio::ADDRESS)?[0]))
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}
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#[inline]
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pub fn write_gpio<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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setting: DigitalIo,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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// Create full command buffer, initialize command bytes to 0 and set data value to status
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// byte.
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let buffer: [u8; 3] = [0, 0, setting.0];
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self.write_registers(spi, gpio::ADDRESS, buffer)
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}
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#[inline]
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pub fn read_offset_calibration<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<OffsetCalibration, <SpiT as spi::ErrorType>::Error> {
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Ok(OffsetCalibration(self.read_registers(spi, ofc0::ADDRESS)?))
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}
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#[inline]
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pub fn write_offset_calibration<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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setting: OffsetCalibration,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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// Create full command buffer, initialize command bytes to 0 and set data values to offset
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// calibration bytes
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let buffer = [0, 0, setting.0[0], setting.0[1], setting.0[2]];
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self.write_registers(spi, ofc0::ADDRESS, buffer)
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}
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#[inline]
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pub fn read_gain_calibration<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<GainCalibration, <SpiT as spi::ErrorType>::Error> {
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Ok(GainCalibration(self.read_registers(spi, fsc0::ADDRESS)?))
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}
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#[inline]
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pub fn write_gain_calibration<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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setting: GainCalibration,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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// Create full command buffer, initialize command bytes to 0 and set data values to gain
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// calibration bytes
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let buffer = [0, 0, setting.0[0], setting.0[1], setting.0[2]];
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self.write_registers(spi, fsc0::ADDRESS, buffer)
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}
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/// Reads all calibration registers. Bytes 0 to 2 are offset calibration, bytes 3 to 5 are gain
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/// calibration.
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#[inline]
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pub fn read_all_calibration<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<AllCalibration, <SpiT as spi::ErrorType>::Error> {
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Ok(self.read_registers(spi, ofc0::ADDRESS)?.into())
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}
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#[inline]
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pub fn exec_cal_command<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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command: &CalibrationCommand,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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let spi_op_result = spi.write(command.into());
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end_spi(&mut self.slave_select, spi, spi_op_result)
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}
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#[inline]
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pub fn read_config<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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) -> Result<Config, <SpiT as spi::ErrorType>::Error> {
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let bytes = self.read_registers::<_, 5>(spi, status::ADDRESS)?;
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Ok(Config::from_bytes(bytes))
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}
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#[inline]
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pub fn write_config<SpiT: SpiBus>(
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&mut self,
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spi: &mut SpiT,
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setting: Config,
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) -> Result<(), <SpiT as spi::ErrorType>::Error> {
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// Create full command buffer, initialize command bytes to 0 and set data value to status
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// byte.
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let buffer: [u8; 7] = [
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0,
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0,
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setting.status.0,
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setting.multiplexer.0,
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setting.ad_control.0,
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setting.data_rate as u8,
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setting.digital_io.0,
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];
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self.write_registers(spi, status::ADDRESS, buffer)
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}
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}
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